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AMD Reveals More Llano Details at ISSCC: 32nm, Power Gating, 4-cores, Turbo? AMD Reveals More Llano Details at ISSCC: 32nm, Power Gating, 4-cores, Turbo?
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AMD Reveals More Llano Details at ISSCC: 32nm, Power Gating, 4-cores, Turbo?
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Old 9th February 2010, 10:52   #1
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Default AMD Reveals More Llano Details at ISSCC: 32nm, Power Gating, 4-cores, Turbo?

After cashing Intelís check and appearing more competitive than expected against Clarkdale 2010 is like a fresh start for AMD. The news gets better.

Late last year AMD said that before the end of 2010 it would be sampling its first APU (Accelerated Processing Unit) - codenamed Llano. Today AMD is announcing that the first Llano samples, built on Global Foundries 32nm high-k + metal gate, SOI process will be sampling to partners in the first half of this year.

http://www.anandtech.com/cpuchipsets...oc.aspx?i=3736
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