19th December 2003, 21:14
Join Date: May 2002
| | PCI Express & DDR2 - Good read
Just as the industry has agreed that PCI Express will be the next generation I/O interconnect standard, it has also determined that DDR2 will be the next standard for DRAM. As a result, we are extremely unlikely to see a repeat of the huge debate that erupted over the relative benefits of PC133 and Rambus.
DDR2 will offer higher speed and lower power consumption than the current mainstream DDR SDRAM, and as we saw at VTF2003 in September all the major DRAM makers are supporting it. Designed to reach speeds of 400MHz, 533MHz and 667MHz, DDR2 will not only run at higher frequencies than DDR SDRAM but will also further boost performance by prefetching 4 bits per clock cycle and then internally pipelining their output. This is double the prefetches of 2 bits per clock cycle delivered by DDR memory, and allows DDR2 to effectively access and output twice the amount of data than DDR at a given time. Running at 1.8V, DDR2 also offers lower power consumption, making it ideal for rapidly emerging new segments such as Small Form Factor PCs and notebooks.
We are working on the integration of support for DDR2 in our forthcoming PT890 chipset and in the second half of the year will put the feature into our next generation of IGP chipsets, the PM890 and PN890. VIA traditionally has had an excellent track record in our memory controller technology, so I'm keeping my finfer crossed that we will be able to continue this tradition by rolling out the fastest DDR2 chipset on the market!
PCI Express Continued |
As I mentioned in my blog yesterday, it has been over a decade since the PCI bus was first introduced into the market. That's a very long time for a standard to exist in the PC industry, particularly if you compare it with the huge advances that have been made in CPUs, graphics, memory, Gigabit Ethernet, and other I/O connectors such as ATA-133, Serial ATA, USB, USB 2.0, and 1394 over the past ten years.
Looked at in another way, this means that while the speed at which data is being processed and transferred within a PC by components such as the processor, graphics card, hard disk, and and memory has dramatically increased, the PCI bus still runs at the same old 33MHz moving data at 133MB/s. This has resulted in a growing number of internal bottlenecks that slow down system performance and which have only been partially alleviated by standards such as AGP and proprietary interconnects between the North and South Bridge such as our own V-Link.
The primary objective of PCI Express is, therefore, to create a new generation internal PC I/O architecture that will remove these bottlenecks and provide a scalable solution that has the headroom required for future upgrades. Unlike the parallel PCI bus, PCI Express is a two-way serial connection that transfers data in packets - in much the same way it is handled over Ethernet connections. Its architecture consists of individually clocked lanes that carry data upstream and downstream at rates of 2.5Gb/s in each direction a huge leap from the current 133MB/s.
Up to 32 lanes can be combined to create a parallel interface of independently controlled serial links, and these lanes can be stacked together to increase the amount of bandwidth available to specific areas of the I/O system. PCI Express Graphics cards will, for example, require 16 lanes, while other components such as PCI Express Gigabit Ethernet controllers will only need a single lane.
The adoption of PCI Express will deliver significant benefits to motherboard makers, most notably because it reduces the amount of trace routes required on a board and hence will ultimately lead to reduced production costs. In addition to desktop PCs, PCI Express will also be adopted in a full range of different products, including desktops, notebooks, servers, and communications devices.
As an open industry standard that is supported by all the major players, I expect that this technology will be adopted by the industry quite rapidly next year, first in desktops and then later on in other devices. VIA is already working on our PT890 and K8T890 PCI Express chipsets for the Intel Pentium 4 and AMD Athlon 64 processors respectively, which we hope to debut in the first quarter of 2004. Our competitors have of course announced similar plans, so it's going to be an interesting race as we work to move the PC into the PCI Express Fast Lane