Stefan Mileschin

Western Digital and Kioxia have announced the successful development of their newest generation of 3D NAND flash memory. Their fifth-generation BiCS 3D NAND has commenced production in the form of a 512 Gbit TLC part, but will not ramp up to "meaningful commercial volumes" until the second half of the year. Other parts planned for this generation include 1Tbit TLC and 1.33 Tbit QLC dies.

The BiCS5 design uses 112 layers compared to 96 for BiCS4. BiCS5 is the second generation from WDC/Kioxia to be constructed with string stacking, and is probably built as two stacks of about 56 active layers each. Even though 112 layers is only a ~16% increase over the previous generation, the companies are claiming a density increase of up to 40% (comparing 112L 512Gb TLC against 96L 256Gb TLC, by bits per wafer), thanks to other tweaks to the design that allow for shrinking horizontal dimensions. The density of the memory array itself is said to be about 20% higher. The memory interface speed has been increased by 50%, which should put it at 1.2GT/s, on par with most of the 96L competitors.

https://www.anandtech.com/show/15455...2layer-3d-nand