Stefan Mileschin

Uses gate-all-around field-effect transistors

TSMC officially introduced its N2 (2nm class) manufacturing technology, its first node that will use gate-all-around field-effect transistors (GAAFETs), at its 2022 TSMC Technology Symposium.

The new fabrication process will offer a full-now performance and power benefits, but when it comes to transistor density, it will barely impress in 2025 when it comes online.

Being an all-new process technology platform, TSMC's N2 brings in two essential innovations: nanosheet transistors (which is what TSMC calls GAAFETs) and backside power rail that serve the same goal of increasing performance-per-watt characteristics of the node.

GAA nanosheet transistors feature channels surrounded by gates on all four sides, which reduces leakage; furthermore, their channels can be widened to increase drive current and boost performance or shrunken to minimise power consumption and cost. TSMC's N2 uses backside power delivery, which the foundry considers to be among the best solutions to fight resistances in the back-end-of-line (BEOL).

https://fudzilla.com/news/55008-tsmc-shows-off-2nm