Madshrimps Forum Madness - AMD Launches AM2 - Benchmarks Numbers from all over the web

from the Anandtech comment box, Fikimiki adds:

Quote:

There are a couple of reasons for that:
- K8L photo had a Z-RAM implemented, so they are using this kind of cache for a quite long time.
- Shared L3 should help Athlon64 in matching Super-Pi and overall performance.
- Usage of Z-RAM will reduce cache die size by 75% with no architectural changes.

So FX-64 to beat fastest Core 2 just needs 4MB of cache...
Easy trick but can be useful to survive till 65nm production...

followed by mlittl3

Quote:

Basically this is what I said above for my guess of the "trick" AMD will use. Anand said it will only affect some high-end users, read FX series so it can't be price cuts as some have suggested (that would effect everyone). Adding L3 cache is the only performance improvement I can think of that doesn't require changing the microarchitecture of the cores (well at least not a big change).

However, TDP is still an issue here as someone above suggested. I don't know how much more power it takes to run L3 cache. Last time AMD did it was on K6 and power wasn't really measured back then.

so they might end up giving the A64 the same cache boost that Intel gave Yonah?