DDR Memory Kit Roundup: Last of the Mohicans

Memory by Berry @ 2006-08-17

DDR is on its last legs with both AMD and Intel now supporting the newer DDR2 modules for their latest platforms. We present you with our most likely last DDR module review; two 2Gb high end memory kits from A-DATA and Team Group strive to help you get the most out of your Athlon 64 setup.

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Everest Ultimate Edition - Membench/CPU-Mem

Everest Ultimate Edition 2.50.480 - Membench

Memory Read

This benchmark measures the maximum achievable memory read bandwidth, also known as burst memory read performance. The code behind this benchmark method is written in Assembly, and reads a 16 MB -- or 2 MB when the evaluated system is low on available physical memory -- sized, 256-byte aligned data buffer from the system memory into the CPU. Memory is read in forward direction, continuously without breaks, and only the first 32-bit data is read from each cache line to achieve the maximum possible memory reading rate.

Cache line is the shortest memory size granularity that the CPU can read from the system memory in a single pass.

Memory Read benchmark test uses only the basic x86 instructions and utilizes only one processor and one thread.

Memory Write

This benchmark measures the maximum achievable memory write bandwidth, also known as burst memory write performance. The code behind this benchmark method is written in Assembly, and writes a 16 MB -- or 2 MB when the evaluated system is low on available physical memory -- sized, 256-byte aligned data buffer from the CPU into the system memory. Memory is written in forward direction, continuously without breaks.

Memory Write benchmark test uses only the basic x86 instructions and utilizes only one processor and one thread.

Memory Latency

This benchmark measures the typical delay when the CPU reads data from system memory. Memory latency time means the penalty measured from the issuing of the read command until the data arrives to the integer registers of the CPU. The code behind this benchmark method is written in Assembly, and uses 1 MB alignment, 1024-byte stride size. Memory is accessed in forward direction.

Memory Latency benchmark test uses only the basic x86 instructions and utilizes only one processor and one thread.


The results:

Madshrimps (c)


Madshrimps (c)


Madshrimps (c)


Madshrimps (c)


All these tests are fairly theoretical, but looking at the figures it seems fair to say that DFI has done a fair job in their bios optimizations, removing the performance hit received when using large modules.

For your info, I did some quick testing on the DFI NF4 Ultra-D and RDX200, and the results on those platforms show a small advantage for the 2x 512Mb modules at 200Mhz, but at higher speeds the 2x1Gb modules catch up and finally overtake (by a meager 5Mb/s).

Everest Ultimate Edition 2.50.480 ? Processor<>Memory Test

CPU Queen

This simple integer benchmark focuses on the branch prediction capabilities and the misprediction penalties of the CPU. It finds the solutions for the classic "Queens problem" on a 10 by 10 sized chessboard (details).

At the same clock speed theoretically the processor with the shorter pipeline and smaller misprediction penalties will attain higher benchmark scores. For example -- with HyperThreading disabled -- the Intel Northwood core processors get higher scores than the Intel Prescott core based ones due to the 20-step vs 31-step long pipeline. However, with enabled HyperThreading the picture is controversial, because due to architectural bottlenecks the Northwood core runs out of internal resources and slows down. Similarly, at the same clock speed AMD K8 class processors will be faster than AMD K7 ones due to the improved branch prediction capabilities of the K8 architecture.

CPU Queen test uses only the basic x86 instructions, it consumes less than 1 MB system memory and it is HyperThreading, multi-processor (SMP) and multi-core (CMP) aware.

CPU PhotoWorxx

This integer benchmark performs different common tasks used during digital photo processing.

It performs the following tasks on a very large RGB image: Fill, Flip, Rotate 90R, Rotate 90L, Random Fill, Colour to Black&White, Difference, Crop.

This benchmark stresses the integer arithmetic and multiplication execution units of the CPU and also the memory subsystem. Due to the fact that this test performs high memory read/write traffic, it cannot effectively scale in situations where more than 2 processing threads used. For example, on an 8-way Pentium III Xeon system the 8 processing threads will be "fighting" over the memory, creating a serious bottleneck that would lead to as low scores as a 2-way or 4-way similar processor based system could achieve.

CPU PhotoWorxx test uses only the basic x86 instructions, and it is HyperThreading, multi-processor (SMP) and multi-core (CMP) aware.

CPU ZLib

This integer benchmark measures combined CPU and memory subsystem performance through the public ZLib compression library Version 1.2.2 .

CPU ZLib test uses only the basic x86 instructions, and it is HyperThreading, multi-processor (SMP) and multi-core (CMP) aware.



The results:

Madshrimps (c)


Madshrimps (c)


Madshrimps (c)


Madshrimps (c)


Looking at the results per clock speed, timings do have an influence, but are limited due to the CPU core used. When using a Winchester or Venice core influences are a little bigger, here the 1Mb L2 cache on the San Diego helps a bit.

Looking at the 250 and 275Mhz results we see a nice comeback of the A-DATA although timings are less tight than the competition.
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