GLOBALFOUNDRIES Silicon Validates 28nm AMS Production Design
 

At next week's Design Automation Conference (DAC) in San Francisco, Calif., GLOBALFOUNDRIES plans to demonstrate an enhanced silicon-validated design flow for its 28nm Super Low Power (SLP) technology with Gate First High-k Metal Gate (HKMG). The flow provides proven and complete front-to-back support for advanced analog/mixed-signal (AMS) design using the industry's latest design automation technology. In addition, the company will reveal jointly developed design flows with its EDA partners in certifying both analog and digital "double patterning aware" flows for its 20nm process, with silicon validation expected in early 2013 at that technology node.

As a result of GLOBALFOUNDRIES' commitment to silicon validation of flows before releasing them, customers have the confidence to produce signoff-ready 28nm digital and analog designs using the industry's most advanced set of design tools, tool scripts, and methodologies from the leading EDA suppliers. The company's tight collaboration with the design tool and IP ecosystem also accelerates its ability to develop working flows for advanced nodes such as 20nm, providing their advantages in gate density, performance, and lower power to customers ahead of other foundries.

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