| ||Thread Tools|
|19th March 2012, 07:20||#1|
Join Date: May 2010
Common Platform Transitions to Adopt FinFET 3D Transistor with 14 nm Fab Process
Common Platform, a consortium of three major silicon fabrication companies: IBM, Samsung, and GlobalFoundries, met at their 2012 Technology Forum, where they announced their intention to transition to FinFET 3D transistor technology, but only with the 14 nanometer (nm) silicon fabrication process. Chips on this process will be built in the 2014~2015 time-frame. 3D transistors is a technology pioneered by Intel, which provides space-optimized, energy-efficient transistors on a nano-scale.
FinFET transistors will be combined with Fully Depleted Silicon-On-Insulator (FD-SOI) to offer extremely high transistor densities, with lower chip power. FD-SOI overcomes the limitation of current partially-depleted SOI (PD-SOI) technology, of lower-yields due to the pressure required for SOI insulation, which nears the breaking-point of strained silicon transistors. FinFET tech will be combined with chip-stacking technology, which helps make devices with better use of available PCB footprint.
|Thread||Thread Starter||Forum||Replies||Last Post|
|Intel 2011 Milestones: The Re-Invention of the Transistor||Stefan Mileschin||WebNews||0||9th December 2011 07:59|
|New transistor design may kick off race to 10GHz||jmke||WebNews||3||10th December 2007 23:31|
|A brief look at Intel's new Common Systems Interconnect (CSI)||jmke||WebNews||1||4th September 2007 18:58|
|ATI to Adopt 45nm Process Technology of TSMC||jmke||WebNews||0||20th October 2006 07:56|
|Intelís Santa Rosa Mobile Platform to Adopt EFI||jmke||WebNews||0||19th April 2006 16:21|
|Intel to move to common CPU architecture||Sidney||WebNews||5||23rd August 2005 21:27|
|10 Common Photo Mistakes & How to Avoid Them||Sidney||WebNews||0||28th April 2005 15:39|