AMD Working on a "Polaris" Chip with 232 mm² Die Area
 

A former AMD employee who was with the company till July 2015, disclosed vague details of the various chip projects he was involved in. Two of those projects, labeled "A" and "B" were core-logic (southbridge). Project "F" drew the attention of the press to a graphics chip with a die-area of 232 mm², 430 function blocks, built on the 14 nm LPP process. A function block can be any differentiated or unique structure on a silicon die. 3DCenter speculates that this could be a GPU based on the company's upcoming "Polaris" (GCN 4.0) architecture; and likely a performance-segment chip from the next-gen GPU family.

http://www.techpowerup.com/220075/am...-die-area.html