AMD Plans First “Fusion” Chips on 32nm SOI Process Technology
 

AMD is planning to launch its first “Fusion” chips using the 32nm silicon-on-insulator (SOI) process technology, according to a recent news-article at Xbitlabs.

“We will have CPUs, so-called Fusion parts, on 32nm SOI in the next-generation and the bulk CMOS [fabrication process] we are evaluating for subsequent generation. [...] For the generations beyond 32nm, we are evaluating our choices, as we do for every generation,” said Dirk Meyer, the company’s CEO during a conference call with financial analysts.

According to AMD’s latest roadmap, its first APU (accelerated processing unit) is codenamed as Llano as a solution for the entry-level market, boasting up to four Shanghai/Phenom II-class cores, combined with 4MB of L3 cache, PC3-12800 (DDR3 1600MHz) memory controller and a DirectX 11-capable graphics core.

http://en.expreview.com/2009/10/17/a...echnology.html