Madshrimps Forum Madness - AMD Athlon64 "Venice"

Die shrinks have long been proclaimed as the way to lower power and higher speed. On the other hand, for about as many years, the issues of leakage currents has been known, that is, with every die shrink, the ratio between leakage and operating currents has gone in the wrong direction at an alarming rate. New process technologies targeting the substrate rather than the actual interconnect process are, therefore, becoming the focus of R&D, from Low-K substrates as used in graphics processors to Silicon-On-Insulator, a technology developed by IBM in the 1950ies.

On the transistor design level, improvements have been made by straining the silicon to physically alter the lattice geometry and thereby optimizing the conductivity between source and drain. Starting out with a relatively simple Silicon-Germanium epitaxy, we are looking at uniaxial compression and stretching for PMOS and NMOS devices, respectively, to speed up the currents and reduce power consumption at the same time. Finally, the concerted efforts in substrate and device technology were supplemented by some functional tweaks on the memory controller and instruction sets to result in a beautiful piece of process engineering and design named "Venice".

We have taken four different cores, that is, ClawHammer, NewCastle, Winchester and Venice for a comparative review of their processing vs. electrical power characteristics and the results pretty much blew us away..........

With both Winchester and Venice cores, we reached a temperature plateau at approximately 28 degree Celsius (38 degrees for ClawHammer and Newcastle), therefore, we disconnected the CPU fan for all measurements to reach temperatures relevant for conditions under full load.

http://www.lostcircuits.com/cpu/amd_venice/