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AMD ingnots, sliced "TBread" with the crusts cut off AMD ingnots, sliced "TBread" with the crusts cut off
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AMD ingnots, sliced "TBread" with the crusts cut off
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Old 25th May 2003, 23:00   #11
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This is all quite amusing for someone who actually works in the industry. It's amazing how ill-informed you all are about things. Wafers are generally faster in the centre, true.
I'd be amazed if AMD binned based on wafer location to the extent you describe. As an Intel stockholder, I'd be delighted if their process was so far out of control. But I'm sure it's not.
You bet they'd sell 50% yielding edge dice - these guys are trying to make money, remember. It probably costs them $15 to assemble and test them, so if they make $30 for them, that's 50% GPM (which actually, they'd kill for).
As for why Intel chips clock faster on a similar process. Why do you think Intel has those long pipelines you all complain about so much? It's so they can clock it faster - longer pipelines means stages with shorter delays, hence faster clock. On a similar process the P4 will inevitably be able to clock faster than Atthlon. That's just physics.
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Old 25th May 2003, 23:08   #12
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Thanks for your contribution, except for the economical part of the matter, what "ill-informed" anomalies did you encounter?

Since this editorial is based upon own research and that of others it is fair to say that some parts of the puzzle could not be found without actually going to a factory and getting the raw facts and data there


I would like to see both companies work closer together to create a better and faster CPU, but thanks to capitalism this might never happen...

its really sad that we see these meager increases in speed just to get the $$$ :/
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Old 26th May 2003, 01:16   #13
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Could it be also that AMD is having problems with their Opteron scaling up and they don't wish the Xp's to become much better performers than the Athlon 64 when (if?) if comes out.
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Old 26th May 2003, 01:16   #14
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In 32 bit performance only of course!
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Old 26th May 2003, 02:51   #15
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Quote:
Originally posted by Unregistered
This is all quite amusing for someone who actually works in the industry. It's amazing how ill-informed you all are about things. Wafers are generally faster in the centre, true.
I'd be amazed if AMD binned based on wafer location to the extent you describe. As an Intel stockholder, I'd be delighted if their process was so far out of control. But I'm sure it's not..these guys are trying to make money, remember. It probably...As for why Intel chips clock faster on a similar process. Why do you think Intel has those long pipelines you all complain about so much? It's so they can clock it faster - longer pipelines means stages with shorter delays, hence faster clock. On a similar process the P4 will inevitably be able to clock faster than Atthlon. That's just physics.
Yes, "I" certainly am "ill-informed." However, what's more "amusing", is while I attempt to theorize (I won't even purport it's a hypothesis in your presence) experts such as yourself, sit high upon their throne of esoteric knowledge, chuckling at the "ill-informed." We enthusiasts blindly scurry down those long, dark Intel pipelines, rapidly shrinking "gate-widths" closing down on us, whilst you and your stockbroker conceal the proverbial lightswitch. Perhaps in my ignorance of the manufactirng process my assumptions were so inaccurate as to become comedian material appropriate for the next Intel Golden Parachute Dividend Event.
Why simply criticize? Why not enlighten us with those facts your "sure" of?
You concur wafers are generally faster in the centre, however; you'd be amazed if AMD binned based on wafer location? How about after testing? I never claimed it was simply about wafer geography. With approximately 300 steps involved in current "Fab" methodology, perhaps there may be as many ramification detrimental to product end stages? And is it not feasable such anomalies cannot always be detected prior to incurring significant manufacturing costs? Therefore, would it not be economically astute to relable cores originally intended for upper end processors, RATHER then re-tool?

In so far as why Intel chips clock faster. This wasn't mentioned in the article, however; it's my hypothesis your divigation to it, reveals your most likely in the marketing, advertsisng, or janitorial area of the industry, not manufacturing. Your bias an an Intel stockholder, is prevelant in your regurgitation of Intel maketing fodder. In so far as the ole' clock speed theory is concerned it's self effacing to site this. Yes you are correct in that Intel architecture results in a "faster" clock rate, and it is, "just" physics. Where you insult the intelligence of enthusiasts such as myself, is the condenscending manner in which you present your argument. The formula for Bandwidth is as follows. Bandwidth = Bus Size x Clock Speed; ergo a DDR 64-bit Bus Size x 300MHz Clock Speed = 2.4GBs : Bandwidth (data). While an RDRAM 16-bit Bus Size x 800MHz Clock Speed = 1.6GBs : Bandwidth of data. So while faster, less data (information) is processed (faster) Analogous to spinning feverishly in first gear, when you have 24. Albeit a memory (or trekking) analogy, Intel has pushed speed so far down our throats were choaking on it (really fast). You have the ad-lingo ad nuaseam. Sorry to "complain". Perhaps my retort wouldn't be as nefarious, had you not been so insultive in your mannerism.

This (ideally) is a forum where idea's are shared, and sometimes challanged. Where others with more experience, assist those with less experience. Where people gain satisfaction in helping others enjoy their computing experience. To simply laugh at us "ill-informed" being an industry insider is indicative of cruelty at the expense of others. My screenname would be "Unregistered" as well, if i were to join a forum for the sole purpose of revilement.
Why not enlighten us instead? Perhaps as an Intel stockholder you reprsent the atypical self centered materialist? After all you invest in a company who recently renegged on their commitment to transition to the 157nm lithography process, adversely affecting the financial stability of mutiple sub-contractors. They found they could skip two nodes utilizing a 193nm lithography process, until EUVL facilities are up and running. As much as I'd like to think Intel's first order of business is building the fastest processor, I know the first order of business is to build the least expensive, fastest processor. After all I subscribe to the Motley Fool when it comes to investing.
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Old 26th May 2003, 03:17   #16
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Quote:
Originally posted by Unregistered
Could it be also that AMD is having problems with their Opteron scaling up and they don't wish the Xp's to become much better performers than the Athlon 64 when (if?) if comes out.
I'll research that, in the interim, why don't you share some of the knowledge we all covet? I promise not to stand on the corner and bum $2.5 billion and open my own Fab plant, based on what you share.

Could it also be AMD's Opteron woes, may be interconnected to Intel's skipping the 157nm process, initally one of it's largest supporters?
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Old 26th May 2003, 03:21   #17
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Quote:
Originally posted by Unregistered
In 32 bit performance only of course!
What "performance" are we CURRENTLY in?
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Old 26th May 2003, 11:08   #18
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Congratz with the excellent article ..

http://www.tweakers.net/nieuws/27135 !
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Old 26th May 2003, 11:12   #19
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good replies there Liquid3D, I hope "Unregistered" steps up to answer some of the questions asked!
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Old 26th May 2003, 11:25   #20
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Sry, read some comments ..

this is a c/p of an reply from liable sources,
and hard to say, but he pulls the article to pieces...

<Gepost door RobT maandag 26 mei 2003 - 10:02 - Score: 4

Klopt niks van dat hele verhaal met die ringen.
Zo werkt het productieproces gewoon niet.
Als de chips in het midden beter zijn dan aan de zijkant, is dit een sterke indicatie dat je productieproces niet in orde is.

* RobT is chipdesigner en hoort best nog wel eens wat van de productiekant

Dat met stofdeeltjes of scheef ingestelde lenzen geeft al aan dat ze van toeters nog blazen weten; de maskers betreffen maar een paar chips (zijn het negatief van 2 bij 2 chips of zo), dus de chips aan de rand worden op dezelfde manier belicht en geproduceert als die in het midden. Dus als er iets scheef zit aan die lenzen voor de belichting of aan de maskers in de hele constructie, dan zou dat bv de chip rechtsonder op het masker ( ! ) slecht overdragen op de wafer. Dan krijg je op de uiteindelijke wafer praktisch een schaakbordpatroon van slechte chips.
Stofdeeltjes? Sorry, maar die chips worden gemaakt in een class 10 omgeving, als het tegenwoordig niet een class 1 omgeving is (het getal geeft daarbij het aantal stofdeeltjes aan dat groter is dan zoveel micron, per kubieke meter); je kan op een wafer een paar chips hebben die kapot zijn door dergelijke onzuiverheden bij de productie, maar de helft??
In dat laatste geval zou ik het rookverbod in de waferstepper ruimte wat steviger bekrachtigen...

Mocht er iets mis zijn met je silicium, kristalroosterproblemen en zuiverheid, dan smijt je niet de helft van je chips weg, maar ga je de discussie aan met je leverancier.

Er staan zo nog veel meer onnozelheden en onjuistheden in het artikel.

De reden dat de laagstgeklokte cpu's dezelfde snelheid halen als je ze overklokt als de hoogstgeklokte, betekent gewoon dat het AMD productieproces heel goed onder controle heeft, en dus eigenlijk een heel hoge yield heeft. Dat betekent (wat hier op t.net al vaak genoeg naar voren is gekomen) dat bijna alle cpu's de hoogste snelheid halen (die is min of meer proces-, design- of thermisch begrensd). Alle cpu's hebben dus zo'n beetje dezelfde kwaliteit, halen dezelfde snelheid, dus dan kijkt amd waarschijnlijk naar het energiegebruik/warmteontwikkeling, etcetc.

Vergeet ook niet dat deze overklokkers niet per se dezelfde tests doen als AMD, of eigenlijk: per se niet.
Denk even terug aan de PIII 1.13GHz die teruggeroepen moest worden omdat Tom van THG erachter kwam dat ze geen linux kernelcompile konden doen; die cpu's waren wel door de toenmalige tests van Intel heengekomen.

Op dezelfde manier komen deze overgeklokte t-breds misschien door de tests van de overklokkers heen, maar AMD heeft bv vastgesteld dat ze niet absoluut stabiel zijn of zo. Of niet absoluut stabiel met alle goedgekeurde psu's, koelers en mobo's of zo.
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