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| | #21 | |
| [M] Reviewer Join Date: Sep 2005
Posts: 1,887
![]() | Quote: ![]() | |
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| | #22 |
| [M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,465
![]() | If Intel increases the cpu-uncore interconnect to 192-bit, even an 8-core design is possible without too much trouble ![]() |
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| | #23 |
| [M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,465
![]() | The question now is where the limitation is of the Nehalem architecture. I still have to read up on how the data is arranged in cpu/cache to figure out in what way the current design can be modified. If anyone has a link that points to an article explaining data arrangement, please post. |
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| | #24 |
| OCTB Crew Join Date: Apr 2005
Posts: 1,338
![]() | all way to technecal for me .im more cavemen, stick and stone if that wont help: its MC Hammer time.
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| | #25 |
| [M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,465
![]() | Couldn't be bothered to make a fine, nice drawing in paint, so just took a picture of the whiteboard as I need to clean it for something new. Sorry for the gigantic picture. ![]() |
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| | #26 |
| Madshrimp Join Date: May 2002 Location: 7090/Belgium
Posts: 78,420
![]() | archive it here, no probs; pic looks tiny on 24" ![]()
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| | #27 |
| [M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,465
![]() | I have a large version, but can't upload it to [M]-threads as it's 2000x1750 |
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| | #28 |
| Madshrimp Join Date: May 2002 Location: 7090/Belgium
Posts: 78,420
![]() | yes, but there's no need for exaggeration I also have 12Mpixel shots![]()
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| | #29 |
| OCTB Member Join Date: Aug 2008 Location: Belguim => Zulte
Posts: 221
![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() | sweet stuf to read man
__________________ nigelpoint.blogspot.com :) |
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