Stefan Mileschin

SK Hynix this week announced that it has completed development of its latest-generation DDR4 memory chips. The new DRAM chips are made using the company’s second-generation 10 nm-class fabrication technology (1Ynm) and feature a number of enhancements designed to cut-down die sizes, reduce power consumption, and improve their frequency potential.

At a high level, the new 8 Gb DDR4-3200 chips consume 15% less power than the company's first-generation (1Xnm) DDR4-3200 devices. The process node bump means that their die size has also been reduced by around 20%, which will eventually help to drive down their costs. Initially, SK Hynix will use its 1Ynm technology to make memory chips aimed at servers and client PCs, but eventually the same tech will be applied to LPDDR memory for mobile devices.

In addition to smaller die size and lower power consumption, SK Hynix’s newly developed 8 Gb DDR4-3200 chips feature two important enhancements: a 4-Phase Clocking scheme as well as the Sense Amplifier Control technology. The 4-Phase Clocking increases signal strength to maintain stability at high data transfer rates. Meanwhile, the SAC lowers possibility of data errors that may occur when transistor sizes shrink.

The new DRAM devices from SK Hynix are the first memory chips to incorporate a quad-phase clocking scheme. While SK Hynix conservatively rates the new chips at DDR4-3200, the quad-phase clocking enhancement may potentially enable a higher overclocking potential, though this is something that has to be tested.

SK Hynix has not yet started mass production of DDR4 chips using its second-generation 10 nm-class fabrication technology. Keeping in mind that even the current-gen DDR4-3200 chips are listed as “sampling” at the company’s website, it is likely that the new chips will hit mass production in 2019.

https://www.anandtech.com/show/13612...phase-clocking