JEDEC Publishes Wide IO 2 Mobile DRAM Standard

Stefan Mileschin · 9th September 2014, 08:47

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD229-2 Wide I/O 2. Wide I/O 2 offers a significant speed increase over Wide I/O, while retaining Wide I/O's vertically stacked through silicon via (TSV) architecture and optimized packaging. Combined, these characteristics position Wide I/O 2 to deliver the ever-increasing speed, capacity, and power efficiency demanded by mobile devices such as smartphones, tablets and handheld gaming consoles. JESD229-2 may be downloaded free of charge from the JEDEC website here.

Wide I/O 2 provides four times the memory bandwidth (up to 68GBps) of the previous version of the standard, but at lower power consumption (better bandwidth/Watt) with the change to 1.1V supply voltage. From a packaging standpoint, the Wide I/O 2 die is optimized to stack on top of a system on chip (SOC) to minimize power consumption and footprint.

http://www.techpowerup.com/204994/je...-standard.html

9th September 2014, 08:47	#1
Stefan Mileschin [M] Reviewer Join Date: May 2010 Location: Romania Posts: 140,646	JEDEC Publishes Wide IO 2 Mobile DRAM Standard JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD229-2 Wide I/O 2. Wide I/O 2 offers a significant speed increase over Wide I/O, while retaining Wide I/O's vertically stacked through silicon via (TSV) architecture and optimized packaging. Combined, these characteristics position Wide I/O 2 to deliver the ever-increasing speed, capacity, and power efficiency demanded by mobile devices such as smartphones, tablets and handheld gaming consoles. JESD229-2 may be downloaded free of charge from the JEDEC website here. Wide I/O 2 provides four times the memory bandwidth (up to 68GBps) of the previous version of the standard, but at lower power consumption (better bandwidth/Watt) with the change to 1.1V supply voltage. From a packaging standpoint, the Wide I/O 2 die is optimized to stack on top of a system on chip (SOC) to minimize power consumption and footprint. http://www.techpowerup.com/204994/je...-standard.html

Similar Threads
Thread	Thread Starter	Forum	Replies	Last Post
JEDEC Releases LPDDR4 Standard for Low Power Memory Devices	Stefan Mileschin	WebNews	0	26th August 2014 08:06
AMD Publishes Mobile Kaveri Specifications	Stefan Mileschin	WebNews	0	27th May 2014 07:16
JEDEC Announces Publication of eMMC Standard Update v5.0	Stefan Mileschin	WebNews	0	2nd October 2013 08:04
JEDEC Announces Publication of DDR4 Standard	Stefan Mileschin	WebNews	0	26th September 2012 07:29
JEDEC Updates Universal Flash Storage (UFS) Standard	Stefan Mileschin	WebNews	0	26th June 2012 06:54
JEDEC Announces Publication of LPDDR3 Standard for Low Power Memory Devices	Stefan Mileschin	WebNews	0	18th May 2012 07:09
JEDEC Publishes Breakthrough Standard for Wide-IO Mobile DRAM	Stefan Mileschin	WebNews	0	6th January 2012 11:41
JEDEC Publishes First Official Spec for Solid-State Drive	jmke	WebNews	0	19th May 2009 22:03
JEDEC announces publication of LPDDR2 standard for low power memory devices	jmke	WebNews	0	7th April 2009 11:33
JEDEC Publishes Spec for Shared Interface Between Flash and DRAM	jmke	WebNews	0	2nd April 2009 18:44