Intel "Rosepoint" Atom Combines x86 Cores with WiFi Transceiver
 

At IDF 2012, Intel showed off an experimental SoC codenamed "Rosepoint," targeted at low power mobile consumer devices. Built on the 32 nm process, the tiny chip combines a full-featured dual-core Atom processor with a WiFi transceiver. This could eliminate the need for external transceivers on Atom-powered devices, reducing the platform's board footprint, and of course, power draw.

The current chip comes with its share of limitations. It supports just 2.4 GHz radio band. According to Intel's Justin Rattner, the chip should scale with Moore's Law, and future versions could have greater capabilities, including cellular data, and built-in antennae. Production versions of the chip aren't due for another two years, so it's safe to assume that Rosepoint is just a development milestone.

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