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Intel Reveals Architecture Details of Intel Xeon Phi Co-Processor Intel Reveals Architecture Details of Intel Xeon Phi Co-Processor
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Intel Reveals Architecture Details of Intel Xeon Phi Co-Processor
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Old 31st August 2012, 07:21   #1
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Default Intel Reveals Architecture Details of Intel Xeon Phi Co-Processor

During HotChips symposium, George Chrysos, the leading architect of Intel Xeon Phi co-processor shared the new architecture details of upcoming Intel's HPC powerhouse. Designed for highly-parallel applications, Intel Xeon Phi co-processor based on Intel Mani Integrated Core architecture will deliver the combination of industry leading performance per watt with the ability to re-use the existing code and applications without necessity of re-writing them.

Equipped with more than 50 cores and built using Intel's latest 22nm 3D Tri-gate transistor technology, new co-processors will be in production this year with first supercomputers from top500 list already taking advantage of this technology. In his blog here, George shares his aspirations and goals during designing the co-processor and summarizes all new disclosed information. The HotChips presentation is also available below.

http://www.techpowerup.com/171436/In...Processor.html
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