Intel Redesigns Xeon, Pentium 4 Extreme Edition Processors
 

Intel Corporation announced changes in the design of the Intel Xeon and Intel Pentium 4 Extreme Edition processors based on 0.13 micron core known as Gallatin. Although the company expects no changes in thermal, logic and other specifications of the chips, the nature of improvements may mean that Intel is trying to get some additional performance out of its high-end microprocessors.

Starting from the 13th of April, 2004, Intel will be shipping its Xeon and Pentium 4 Extreme Edition processors with 1MB or 2MB L3 cache based on two different 0.13 micron process technologies. Processors on both 130nm fabrication processes implement the same CPUID, their logic and circuitry designs are identical. Products’ electrical, thermal and mechanical properties are also fully equivalent. The only change the so-called “alternate” 0.13 micron process brings is 2 additional interconnect metal layers.

The original Intel Xeon processors at 2.40GHz, 2.80GHz, 3.06GHz and 3.20GHz for 2-way server and workstations as well as Intel Pentium 4 Extreme Edition chips at 3.20GHz and 3.40GHz for powerful desktops contain 6 metal layers, the new chips will have 8 layers. Intel did not explain the necessity for the move to customers, but emphasized that they needed to perform no new qualification activity for the parts.

Chipmakers usually add more metal layers into designs either to get some additional functionality or shielding. Extra functionality usually causes changes in specifications of central processing units, while metal layers implemented for shielding purposes do not affect specifications.

Additional shielding is typically necessary to improve yields of the chips at current core-clocks or even provide some additional frequency headroom for future products working at or beyond 3.40GHz – the highest speed for Intel’s microprocessors with 2MB of L3 cache.

Intel’s spokesman said that the modifications were aimed to improve yields and possibly increase processor availability as a result of the change

http://www.xbitlabs.com/news/cpu/dis...312121737.html