Intel Details Haswell Overclocking at IDF Beijing
 

As we march towards the June 2nd release of Intel's Haswell processors, the company is slowly but surely filling in the missing blanks. Most recently we saw a shot of the often discussed but rarely seen Haswell GT3e part with on-package DRAM, and today we get some confirmation on what overclocking Haswell will be like.

As a quick refresher, the max clock frequency of Haswell is governed by the following equation:

Clock Speed = BCLK * Ratio

In the old days, both of the variables on the right hand side were unlocked (back then it wasn't called BCLK). Around the time of the Pentium II, Intel locked the multiplier ratios (rightmost variable) and then a few years ago we lost the ability to manipulate un-multiplied input frequency.

We can actually trace the recent struggles with BCLK overclocking back to the days of Lynnfield in 2009. Lynnfield featured Intel's first on-die PCIe controller, which wasn't fully decoupled from the rest of the CPU. We still had BCLK overclocking, but you needed to supply higher core voltages to the CPU to get there with any amount of stability. Nehalem, Lynnfield's predecessor, didn't have this issue.

With Sandy Bridge, we lost the ability to overclock using the BCLK altogether. Intel made good on this tradeoff by giving us a couple of K-series SKUs with unlocked multipliers, but it pretty much killed the market for buying low end Intel CPUs and overclocking them to deliver the performance of much higher end parts (sidenote: this is why we need AMD, ARM only pushes Intel to be more competitive on power at this point).

Ivy Bridge didn't really change things, but Sandy Bridge E did restore a bit of BCLK overclocking. You could select from a handful of predefined straps that enabled BCLK overclocking but without running the PCIe or QPI busses out of spec. With Haswell, we get something similar.

http://www.anandtech.com/show/6898/i...at-idf-beijing