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22nd January 2008, 16:13 | #1 |
Member Join Date: Mar 2004
Posts: 15,738
| Explaining Core 2's FSB, RAM, and bandwidth Today, Icrontic serves up a crash-course in the mysterious relationship of the Core 2 front side bus, RAM and bandwidth. The nature of the Core 2's design may be baffling, particularly to users exiting the era of synchronized Athlon XP buses, and we intend to cut through the haze and serve it straight just as we like to. http://icrontic.com/articles/core2_fsb_explained
__________________ lazyman Opteron 165 (2) @2.85 1.42 vcore AMD Stock HSF + Chill Vent II |
22nd January 2008, 19:51 | #2 | |
[M] Reviewer Join Date: Nov 2004
Posts: 4,127
| Quote:
As you can see, the FSB is not directly linked to the memory bus, the front side bus is a communication bus protocol which the CPU uses to communicate with other hardware componentsn not only the memory in specific. Data travels through the NorthBridge, which serves as memory controller, but also takes control of data travelling from and to PCIe devices, or the from and to the southbridge which handles even more hardware components. Simply saying that an 1:1 ratio is excellent because of the bandwith parity between FSB en DRAM does not sound to well, computing is far more complex then that, and even though if it wasn't then you would also have to keep in mind the bandwidth that is lost because of the other components demanding their part of the FSB bus bandwidth. Performance wise, more is better, most of the time your well picked DRAM chips can run at much higher frequency's then 500MHz while the amount of people hitting over 500MHz bus speed is not high actually, just think of the many story talking about FSB wall's, certainly those wo have Quad Core CPU's, people getting their quads over 500MHz FSB are very rare. If this article is meant to support people in their first overclocking adventures, I'd appriciate the work put in the article, but in the end it doesn't require to many skills to pick a ratio larger then 1 and get your system stable, and you do get a performance boost. Even if it was to be very small, it still did came for free. | |
22nd January 2008, 19:55 | #3 |
Madshrimp Join Date: May 2002 Location: 7090/Belgium
Posts: 79,021
| yup our older article proves that FSB & MEM does not need to run sync for best performance: http://www.madshrimps.be/gotoartik.php?articID=472
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22nd January 2008, 20:26 | #4 |
[M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,466
| 2:3 and tRD (PL) at 5 is pretty fast afaik |
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