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Experimental MIT chip brings cache coherency to many cores Experimental MIT chip brings cache coherency to many cores
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Experimental MIT chip brings cache coherency to many cores
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Old 24th June 2014, 09:52   #1
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Default Experimental MIT chip brings cache coherency to many cores

CPU core counts are growing. Four or eight cores are pedestrian nowadays, and core counts in the double digits are becoming increasingly common in the server space. To address the problems of efficient, scalable inter-core communication between large numbers of cores, researchers, including a group at MIT, have been exploring a design called a "network on a chip," or NoC. At the International Symposium on Computer Architecture last week, the MIT group outlined its first silicon based on the design: an experimental 36-core chip called Scorpio.

http://techreport.com/news/26681/exp...-to-many-cores
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