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CES 2019 Quick Bytes: Intel’s 10nm Hybrid x86 Foveros Chip is Called Lakefield CES 2019 Quick Bytes: Intel’s 10nm Hybrid x86 Foveros Chip is Called Lakefield
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CES 2019 Quick Bytes: Intel’s 10nm Hybrid x86 Foveros Chip is Called Lakefield
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Old 8th January 2019, 08:57   #1
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Default CES 2019 Quick Bytes: Intel’s 10nm Hybrid x86 Foveros Chip is Called Lakefield

At Intel’s Architecture Day, the company showed off a new stacking technology called ‘Foveros’, which is designed to allows the company to make smaller chips. The idea behind Foveros is to have a base ‘interposer’ that also integrates common I/O functionality, while using connections through the chip to another piece of silicon on top that has the CPU cores and the graphics subsystem. We saw chips that were working and processing data, and it all looked really cool.

The reason this chip exists is because one of Intel’s customers requested a processor with integrated graphics that can idle at 2 milliwatts. After a few years of engineering, Intel is finally there. There’s also another trick at play here.

The chip uses a combination of Intel’s high power and low power cores. Inside the new chip, which Intel announced at CES is called Lakefield, is one of its high-powered Core architecture Sunny Cove cores, and four low-powered Tremont Atom cores. This is the first Intel chip, or consumer chip at least, to use both core designs at once. This is fairly common for Arm chips in smartphones, but we have not seen it yet in the PC space. We have a block diagram showing cache layouts and things, and at the first showing, Intel’s Jim Keller said that the company were having fun with the technology with designing things that could become future parts.

Today’s announcement is around the Lakefield family name for the processor. We’re expecting this to generate a family of *field parts in the future.

https://www.anandtech.com/show/13776...lled-lakefield
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