Apple's A5X Die (and Size?) Revealed

Stefan Mileschin · 16th March 2012, 07:03

iFixit saved us all a whole lot of trouble and performed a teardown of the new iPad announced last week. The internals were mostly what we expected, down to the Qualcomm MDM9600 LTE baseband. Despite many of the new iPad's specs being a known quantity prior to launch, there were a few surprises in the teardown.
First and foremost, Apple has moved away from a PoP (Package-on-Package) stack with the A5X SoC and now uses two discrete DRAM devices. The iPad iFixit took apart featured two 512MB Elpida LP-DDR2 devices on the side of the PCB that doesn't feature the A5X (in yellow, below). The A5 SoC featured a dual-channel (2x32-bit) LP-DDR2 memory interface running at up to an 800MHz data rate.

http://www.anandtech.com/show/5681/a...-size-revealed

16th March 2012, 07:03	#1
Stefan Mileschin [M] Reviewer Join Date: May 2010 Location: Romania Posts: 148,462	Apple's A5X Die (and Size?) Revealed iFixit saved us all a whole lot of trouble and performed a teardown of the new iPad announced last week. The internals were mostly what we expected, down to the Qualcomm MDM9600 LTE baseband. Despite many of the new iPad's specs being a known quantity prior to launch, there were a few surprises in the teardown. First and foremost, Apple has moved away from a PoP (Package-on-Package) stack with the A5X SoC and now uses two discrete DRAM devices. The iPad iFixit took apart featured two 512MB Elpida LP-DDR2 devices on the side of the PCB that doesn't feature the A5X (in yellow, below). The A5 SoC featured a dual-channel (2x32-bit) LP-DDR2 memory interface running at up to an 800MHz data rate. http://www.anandtech.com/show/5681/a...-size-revealed

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