Stefan Mileschin

Apacer has announced a lineup of 32-bit SO-DIMMs designed for systems based on processors featuring Arm, RISC, or RISC-V architectures. The memory modules will enable SoC developers to take advantage of capacity and performance flexibility offered by modular memory solutions.

Memory organization is a bit different between x86 and Arm/RISC-V based systems. The former typically feature one or more 64-bit memory interfaces to connect one or more 64-bit memory modules (or just a set of DRAM chips) in a bid to maximize raw memory bandwidth and capacity. By contrast, Arm or RISC-V powered SoCs use one or more 16-bit memory interfaces for granularity, power, and efficiency (to maximize channel utilization and effective memory bandwidth) reasons. Since the vast majority of Arm or RISC-V based systems are either mobile or special purpose, most of the memory subsystems are custom-designed with only a handful of SoCs featuring “wide” memory interfaces. As a result, most of them cannot use industry-standard 64-bit DIMMs and rely on soldered down memory.

The situation is changing with release of Arm-powered server processors, but many of emerging applications still do not need 64 or 128-bit DRAM subsystems, but could take advantage of flexibility that memory modules provide in general. Apacer has offered 32-bit DDR2 and DDR3 modules for such devices for years and is now addressing this need with its new 32-bit DDR4 SO-DIMMs.

By using modules instead of soldered-down memory subsystems, developers of applications running processors featuring Arm, RISC, or RISC-V architectures will be able to save PCB space, provide manufacturing flexibility, and ensure DRAM upgradeability of their products.

https://www.anandtech.com/show/13635...risc-v-systems