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AMD Zen Microarchiture Part 2: Extracting Instruction-Level Parallelism AMD Zen Microarchiture Part 2: Extracting Instruction-Level Parallelism
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AMD Zen Microarchiture Part 2: Extracting Instruction-Level Parallelism
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Old 24th August 2016, 10:50   #1
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Default AMD Zen Microarchiture Part 2: Extracting Instruction-Level Parallelism

Hot Chips is an annual conference that allows semiconductor companies to present their latest and greatest ideas or forthcoming products in an academic-style environment, and is predominantly aimed as the professional semiconductor engineer. This year has a number of talks about power management, upcoming IBM CPUs, upcoming Intel CPUs, upcoming NVIDIA SoCs and the final talk of the final day is from AMD, discussing Zen in even more depth than the previous week. While we were unable to attend the event in person, we managed to get some hands-on time with information and put questions to Mike Clark, AMD Senior Fellow and Chief Design Engineer on Zen.

http://www.anandtech.com/show/10591/...el-parallelism
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