AMD Third-Generation APUs to be Built on 28 nm Process

Stefan Mileschin · 22nd October 2012, 08:29

A leaked company roadmap slide revealed that AMD's third-generation performance APU, codenamed "Kaveri," will be built on the 28 nm silicon fabrication process. The chips will be built by Global Foundries. Kaveri combines AMD's next-generation CPU architecture codenamed "Steamroller" with Graphics CoreNext GPU architecture.

In addition to Kaveri, AMD will introduce a major update to its low-power APU lineup with "Kabini." A true successor to "Brazos," Kabini features x86-64 cores built on the energy-optimized "Jaguar" architecture (which succeeds "Bobcat," on which Brazos APUs are built). It is also mentioned that Kabini will be a true system-on-chip (SoC), with integration of the FCH chipset into the APU silicon. Such an integration could increase die size and complexity, but could also minimize the board footprint of the platform, making it possible to use the SoC in thin tablets, and COMs.

http://www.techpowerup.com/174033/AM...m-Process.html

22nd October 2012, 08:29	#1
Stefan Mileschin [M] Reviewer Join Date: May 2010 Location: Romania Posts: 148,500	AMD Third-Generation APUs to be Built on 28 nm Process A leaked company roadmap slide revealed that AMD's third-generation performance APU, codenamed "Kaveri," will be built on the 28 nm silicon fabrication process. The chips will be built by Global Foundries. Kaveri combines AMD's next-generation CPU architecture codenamed "Steamroller" with Graphics CoreNext GPU architecture. In addition to Kaveri, AMD will introduce a major update to its low-power APU lineup with "Kabini." A true successor to "Brazos," Kabini features x86-64 cores built on the energy-optimized "Jaguar" architecture (which succeeds "Bobcat," on which Brazos APUs are built). It is also mentioned that Kabini will be a true system-on-chip (SoC), with integration of the FCH chipset into the APU silicon. Such an integration could increase die size and complexity, but could also minimize the board footprint of the platform, making it possible to use the SoC in thin tablets, and COMs. http://www.techpowerup.com/174033/AM...m-Process.html

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