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| | #11 |
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| Yes it s the 2.6k resistor that I ve measured between Vdiff and IDroop (so point 5 and 9 yes) If I pencil this resistor, Rfb will be null right ? so Vdroop = Iavg x Rfb with Rfcb -> 0 will be null .? Last edited by fishton : 23rd July 2007 at 13:11. |
| | #12 |
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| | #13 |
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| More information for you Massman. From my measures, I ve identified the layout scheme used with the ISL6327 ![]() As you can see, the scheme seems to be the same as datasheet one for Regulation with Loadline. The scheme have much more sense for me and for you ? What do you think about RFB (pin 5 to 9) ? Can I use pencil to reduct its value in order to reduc VDroop ? Last edited by fishton : 24th July 2007 at 14:54. |
| | #14 |
| [M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,465
![]() | pin 5 to 9 was my first thought too. If it was my board, I would give it a shot, but be VERY careful!!! |
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| | #15 |
| [M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,465
![]() | Then the mod should look like this, right? Last edited by Massman : 24th July 2007 at 17:17. |
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| | #16 |
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| | #17 |
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| | #18 |
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| On your scheme, yellow dots are already connected, I think you make a mistake in your drawing. For the Vcore, 1 is not connected to Ground i think (I ll verify tonigh), it s connected to COMP |
| | #19 |
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| I forgot smthing : THX FOR YOUR HELP |
| | #20 |
| [M] Reviewer Join Date: Nov 2004 Location: Waregem
Posts: 6,465
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