iPhone 5 Memory Size and Speed Revealed: 1GB LPDDR2-1066

@ 2012/09/17
Quick analysis of the A6 SoC photos from the iPhone 5 launch event tells us all we need to know about the memory interface, speed and bandwidth of the new platform. As always, the A6 features a PoP stack combining the SoC itself and its DRAM. The package-stacked DRAM helps save space, which comes at a premium inside a device as small as a smartphone. PoP stacks are quite common in all modern smartphones.

Apple thankfully didn't obscure the details of its A6 slide at the launch event, which gave us a Samsung part number: K3PE7E700F-XGC2. Through crafty navigation of Samsung's product guide, Brian Klug got us the details. The K3P tells us we're looking at a dual-channel LPDDR2 package with 32-bit channels. The E7E7 gives us the density of each of the two DRAM die (512MB per die, 1GB total). The final two characters in the part number give us the cycle time/data rate, which in this case is 1066MHz.

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