Nvidia GF100 pulls 280W and is unmanufacturable?
@ 2010/01/18What is Nvidia going deliver? As we have said earlier on tapeout, the GF100 Fermi is a 23.x * 23.x mm chip, we hear it is within a hair of 550mm^2. This compares quite unfavorably to it's main competitor, ATI's Cypress HD5870 at 334mm^2. ATI gets over 160 chip candidates from a wafer, but Nvidia gets only 104. To make matters worse, defective chips go up roughly by the square of chip the area, meaning Nvidia loses almost three times as many dies to defects as ATI because of the chip size differential.
The raw manufacturing cost of each GF100 to Nvidia is more than double that of ATI's Cypress. If the target product with 512 shaders is real, the recently reported 40 percent yield rates don't seem to be obtainable. It won't hit half of that based on Nvidia's current 40nm product yields, likely far far less.
Cost aside, the next problem is power. The demo cards at CES were pulling 280W for a single GPU which is perilously close to the 300W max for PCIe cards. Nvidia can choose to break that cap, but it would not be able to call the cards PCIe. OEMs really frown on such things. Knowingly selling out of spec parts puts a huge liability burden on their shoulders, and OEMs avoid that at all costs.
The raw manufacturing cost of each GF100 to Nvidia is more than double that of ATI's Cypress. If the target product with 512 shaders is real, the recently reported 40 percent yield rates don't seem to be obtainable. It won't hit half of that based on Nvidia's current 40nm product yields, likely far far less.
Cost aside, the next problem is power. The demo cards at CES were pulling 280W for a single GPU which is perilously close to the 300W max for PCIe cards. Nvidia can choose to break that cap, but it would not be able to call the cards PCIe. OEMs really frown on such things. Knowingly selling out of spec parts puts a huge liability burden on their shoulders, and OEMs avoid that at all costs.
Can't find the article but either Anandtech or TechReport extrapolated the die size based upon transistor count + die sizes from past 65nm and 55nm process shrinks. Even BSN says it is smaller than G80. Link If they could do it with G80, then they can with GF100.