JEDEC Publishes Spec for Shared Interface Between Flash and DRAM

JEDEC, the global standards development organization for the microelectronics industry, on Thursday announced the publication of JESD209-2 LPDDR2 Low Power Memory Device Standard. The LPDDR2 is a shared interface for nonvolatile memory (NVM) and volatile memory (SDRAM), and a range of densities and speeds. The standard enables increased memory density, improved performance, smaller size, overall reduction in power consumption as well as a longer battery life.

“Reducing power consumption, improving performance and a shared NVM/SDRAM interface will help the industry offer significant benefits to product developers and consumers,” said Mian Quddus, JEDEC Board of Directors Chairman.

In response to increasing demand for reduced power consumption by devices, the JEDEC LPDDR2 standard offers several power-saving features. LPDDR2 includes a reduced interface voltage of 1.2V from the 1.8V specification in the previous (LPDDR) memory technology, which will result in a reduction in power consumption of over 50% under similar device density and performance conditions. The standard further encompasses devices having a core voltage of 1.2V (as compared to existing 1.8V core voltage devices), further decreasing device power consumption.