Intel Xeon “Nocona” to Release on Monday@ 2004/06/23
The new Intel Xeon “Nocona” processors will be fairly different compared to the Xeon CPUs shipping now from numerous micro architectural points of view. The main difference is certainly support for 64-bit extension technology; however, there are numerous factors that will drive speed of Xeon products upwards. Firstly, Nocona’s L1 cache is two times larger compared to the current Xeon DP processors’ and equals to 16KB. Secondly, Nocona includes 16K uOps Trace Cache, a substantial improvement over current 12K uOps. Thirdly, 90nm DP products will make use of Prescott’s new, more efficient branch prediction mechanism. Fourthly, the fresh Xeon 1M microprocessors will feature SSE3 technology. Fifthly, the innovative Xeon chips will have 1MB of L2 cache compared to 512KB L2 cache on current offerings. Finally, the new Intel Xeon “Nocona” will boast with enhanced efficiency of the Hyper-Threading technology. Additionally, the new Xeon chips will have 800MHz Quad Pumped Bus, a boost over Intel’s present Xeon chips’ that feature 400MHz or 533MHz processor system bus.
In addition, Intel will release its much-anticipated Tumwater (E7525) core-logic for 2-way workstations bring PCI Express x16, dual-channel DDR2 SDRAM memory as well as some other capabilities for the workstation market segment. Server chipsets code-named Lindenhurst will be available in the third quarter.
World’s leading workstation makers – IBM, Dell, HP and some others are expected to release workstations powered by Intel’s Xeon DP chips with EM64T technology.
Officials from Intel did not comment on the story.