Transmeta to Showcase 90nm Processors at Computex@ 2004/05/31
Transmeta’s highly-acclaimed Efficeon processor delivered in mid-October 2003 after some delays is a 256-bit VLIW chip that integrates DDR SDRAM memory and AGP controllers as well as 512KB or 1MB L2 caches depending on its version. It uses special code-morph software to run conventional x86 applications.
The 90nm Efficeon microprocessors will sport LongRun2 technology for optimized power consumption and will also increase performance over 130nm predecessor. The first 90nm chip to be demonstrated at Computex Taipei 2004 later this week will function at 1.60GHz, about 300MHz higher compared to today’s flagship Efficeon chip. Transmeta’s processors that will debut in products later this year will also sport NX bit, a security feature supported by AMD64 and future Intel’s Pentium 4 central processing units.
Transmeta’s new LongRun2 technology is able to control transistor leakage through software while a chip is running. Transmeta’s LongRun2 software works to control leakage as an interdisciplinary solution in combination with special circuits in the Efficeon processor, and with a standard CMOS process. During the demonstration at the Microprocessor Forum conference, Transmeta showed the Efficeon processor adjusting leakage up to hundreds of times per second while playing a video game, playing a DVD movie and going into standby. In standby mode, Efficeon core leakage power was reduced by approximately 70 times by using LongRun2 technology, according to Transmeta.
Santa Clara, California-based developer of microprocessors with low power consumption produces its 90nm chips at Fujitsu Microelectronics’ facility in Japan. The first 90nm products for Transmeta were manufactured in January 2004.