Intel is Heading Towards Dual-Core Desktop, Mobile, Server Processors@ 2004/03/02
There are dozens of ways to improve performance of central processing units. Microprocessor makers have been utilizing nearly all of them throughout the history of chip making. The main factors that drive CPU performance up are core-clocks, cache sizes, I/O speed. At some point it becomes inefficient and insufficient to add more frequency improvements and chipmakers have to improve the micro architecture of their products by adding media/vector processing extensions, branch and memory pre-fetch, out of order execution mechanisms, security and virtualization features, etc.
Eventually, processors become so powerful that increasing its speed is trickier than adding extra processing cores and enable the chip to handle more than one thread at the same time. The first implementation of such approach is virtual multiprocessing, e.g. Intel’s Hyper-Threading, when one processing core uses different units to handle different threads; a more powerful implementation is multiply cores on the same microprocessor. Historically, multi-core and multi-threaded architectures have not been in the mainstream market. Nowadays Intel already offers a family of processors with Hyper-Threading technology – virtual multiprocessing – it now looks like in 2005 Intel will start to offer microprocessors with 2 cores.
Intel’s first product with dual-core capability will be the Itanium 2 chip code-named Montecito scheduled for mid-2005 launch that will come with 24MB of L3 cache and will serve in high-performance MP machines. The Montecito will be complemented by lower-cost Millington and LV Millington CPUs. The follower of Montecito will be Tukwila – Intel’s first multi-core chip – targeted for 2006 release at 65nm nodes.
Surprisingly, but sometime in mid-2005 or later Intel is anticipated to add a processor with two cores in its Pentium M family intended for notebooks. Apparently, the code-named Jonah chip is projected to contain two Dothan cores and to be made using 65nm fabrication technology. The central processing unit is said to disable the second core when functioning on battery power and will enable both cores once the computer is plugged to power outlet. Thermal Design Power of Jonah is likely to be about 45W, while die size is expected to be 100 – 120 square millimeters. The successors of Jonah are Merom, Conroe (2006) and Gilo (2007) processors, all featuring brand-new architecture with 64-bit extension technology. Conroe may become Intel’s first dual-core IA32e processor for desktop computers.
Intel’s IA32e dual-core chip currently known as Tulsa will emerge in late of 2005, as Intel stated originally. This will be the first Xeon MP microprocessor with two cores. Thanks to the Hyper-Threading technology, the chip will be able to handle four or more threads at once, competing with solutions from other server chipmakers. There is no information about infrastructure for Intel Xeon “Tulsa” at the moment.
In performance desktop and DP server/workstation markets dual-core chips are only said to emerge in 2006 along with Nehalem architecture that also boasts with IA32e extensions.
In 2003 Intel uncovered plans to implement its special “arbiter” bus into the chip code-named Montecito to manage how the cores collaborate between themselves, how they utilise their processor system bus and cache. No actual peculiarities of the design have been presented by Intel officials so far, but we can pre-suppose that the “arbiter” bus architecture may be utilised in all multiple-core CPUs from Intel that will come in future.
The culmination of Intel’s multi-threading will be the companies Vanderpool technology that will let personal computers to be split into several “virtually independent machines”.
Intel officials did not comment on the story.