ClearSpeed sets its sights on the final frontier

@ 2007/09/04
Longtime Ars readers will recall that ClearSpeed Technology came out of the gate back in 2003 with a ton of hype behind it when the company announced a many-core prototype chip that could do 25.6 GFLOPS on 2W. That was a lot of floating-point performance on a single chip in the days before the GPGPU wars really kicked off. But in spite of its stellar numbers, ClearSpeed's first major commercial design win didn't happen until 2006, when ClearSpeed coprocessors were deployed alongside AMD processors in a top-ten supercomputing installation in Japan. ClearSpeed's latest product, which does 66GFLOPS on 25W, scored the company a spot as an optional add-in in IBM System Cluster 1350, but that still doesn't get ClearSpeed out of the profitable but low-volume HPC niche.

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