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@ 2007/08/31Advanced Micro Devices on Thursday announced availability of Streaming SIMD (Single Instruction, Multiple Data) Extensions (SSE5) specification. The new instructions promise higher performance and execution efficiency and will be implemented into microprocessors due in 2009.
The 170 new SSE5 instructions will improve central processing units’ (CPUs’) performance in high performance computing (HPC), multimedia and security-related applications, according to AMD. The new set includes such instructions as fused multiply accumulate (FMACxx), integer multiply accumulate (IMAC, IMADC), permutation and conditional move, vector compare and test, precision control, rounding, and conversion instructions.
The 170 new SSE5 instructions will improve central processing units’ (CPUs’) performance in high performance computing (HPC), multimedia and security-related applications, according to AMD. The new set includes such instructions as fused multiply accumulate (FMACxx), integer multiply accumulate (IMAC, IMADC), permutation and conditional move, vector compare and test, precision control, rounding, and conversion instructions.
