Google experiments with RISC-V
@ 2022/09/27All our AI will be open saucy
SiFive RISC-V chips are being used by Google to run some of its AI workloads and tested in Google datacentres.
SiFive's Intelligence X280 is a multi-core RISC-V design with vector extensions. When combined with the matrix multiplication units (MXU) lifted from Google’s Tensor Processing Units (TPUs) it is supposed to deliver greater flexibility for programming machine-learning workloads.
SiFive RISC-V chips are being used by Google to run some of its AI workloads and tested in Google datacentres.
SiFive's Intelligence X280 is a multi-core RISC-V design with vector extensions. When combined with the matrix multiplication units (MXU) lifted from Google’s Tensor Processing Units (TPUs) it is supposed to deliver greater flexibility for programming machine-learning workloads.