Memory Conflicts among three 875&865 motherboards

Memory by KeithSuppe @ 2003-08-19

Silicon or Succotash, Memory Conflicts among three 875-865 motherboards: Claims have been made, Quality and Control tests performed on initial batches of 875 silicon (NB-MCH) where the NB silicon failed so many criteria, and a budget version had to be released. Intel, in an effort to save thousands of pieces from the dumpster, announced Canterwood?s younger brother, Springdale. Has Intel taken sub-par silicon, and made Succotash?

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Binning the 875/865

It's important to point out that both the Abit IS7-E, and IC7-G are each up to BIOS revision 15 and 16 respectively. When a motherboard manufacturer releases this many revisions, it may be indicative of a faulty motherboard design (need for revision), and/or innate problems with the Chipset (ibid). Since writing this article, there may be more revisions. Initially many experts informed me these anomalies were BIOS related. Yet the fact these anomalies transcend two motherboard makers, three different north-bridge MCH's, and three different memory types, I believe it to be hardware related, or a combination. In fact the integrity of the 875/865 binning process was discussed some time ago at Overclockers.com:

"It really boils down to whether or not Intel is effectively binning. Do they really test everything, and only the cream of the crop ends up being Canterwoods? Or (more likely) do they just test enough to get their quota of Canterwoods, and everything else that works becomes Springdales, and of the Springdales, how many of these would qualify as Canterwoods? ...This tells me there's a lot of variation among these Springdales, which means there's a level of risk associated with them. Not a big deal running stock, and probably not one running a modest overclock, but a much bigger deal when you are pushing the envelope..."



Considering many claim the Springdale chipset was not an "intended" design, but the result of binning 875 NB's, my first question is two-fold; "Is the 865 born of a binning process, or an autonomous design, from silicon, to Package?" and given the fact enough chips failed to meet 875 criteria to fill orders for an entire distinct line, "Are these bin-split's indicative of problems innate to the 875's design?" Until reading the 865 article at Lost Circuit's, I was partial to the school of thought supporting unintentional binning. That is to say, once the 248nm light waves begin striking the wafer, and the template masks are complete, the investment has already reached the $-billion + mark. Even if Springdale were no more then an effort between Intel's Manufacture and Marketing, to save large numbers of sub-par chips, it's not uncommon to have a proxy. Although Overclockers.com, happens to disagree with my supposition;

"Whoever thought that the main differences between the Canterwood and the Springdale chipset are confined to yield issues or else just another marketing plot by Intel will be disappointed to learn that the two chipsets are somewhat different. On the grounds of the silicon itself, there are very little differences between the two chipsets, the most prominent being the already mentioned omission of PAT and the lack of ECC support in the case of Springdale..."



Of course given the fact so many manufacturers have introduced utilities such as Hyperpath, GAT, and other PAT-like 865 optimizations, the chipsets must be related architecturally. In my article Pseudo PATronizing with the 865 (found at Xtremesys) I forewarned enabling PAT features among chips binned based on their inability to run in this mode, was defeatist. Of course the fact they've introduced these utilities, is indicative PAT is innate to both 865/875, but only enabled by default in the latter. This contradicts Overclockers.com, and indicates the NB-MCH on the 865 and 875 are physically identical. Had more enthusiasts/overclockers, been interested in Gbit LAN, they'd probably find a way to enable this as well. Some of the anomalies detailed in this article have been discussed recently at Sudhian. I give Sudhian a lot of credit for their astute observations;

"It was apparent almost immediately following the launch of Canterwood that there were issues concerning the chipset's memory compatibility. Systems using RAM that had formerly tested as perfectly stable on i845PE and nForce2 boards would crash badly, returning to stability only when older, slower RAM was used. In one case (AOpen's) the board crashed so badly I thought it was physically defective, refusing even to POST correctly. Time and research has shown this to be a chipset limitation, as Canterwood is not capable of running a tRAS (RAS-to-CAS delay) of "2". The problem is, much of the high-end memory currently available specifies a "2" result as default, leading to problems. While some boards proved more stable then others when using a tRAS of 2, none of them were stable enough for regular use. At the moment, the best solution to this issue is to avoid it altogether and purchase RAM that's been manufacturer-certified for Canterwood. Corsair, OCZ, and Kingston all offer parts that are guaranteed and tested on Canterwood boards. Those of you with older DDR400 are probably in luck—the older RAM didn't use the faster tRAS and hence doesn't suffer from this issue..."



Obviously the highlighted sentences above, are at the heart of the issue. The first being the bane of my existence, the second being a problem which just shouldn't exist on a chipset designed for 6.4GB/s (theoretical) Dual Channel performance. Until I came across the Sudhian artcile, I'd been concerned I'd absorbed an Alzheimer’s level dose of silver, spreading too much thermal paste bare fingered. I thought I was loosing my mind. Thought for today, use gloves while spreading thermal paste containing 99% silver particles. All tasteless humour aside, one would think the newer DDR500 released may be capable of circumventing the problems which were made public in the Sudhian Canterwood Roundup. If they knew it was a "chipset limitation" how then could motherboard as well as memory manufacturers missed this?
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